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EUV prints critical layers for 22-nm SRAM

IMEC (Interuniversity Microelectronics Center) reports having used ASML’s EUV (extreme-ultraviolet) Alpha lithography tool to print the contact and metal patterns for a 22-nm-node SRAM cell—apparently, the first application of the tool for multiple layers ... External Source

Selecting the correct process geometry and options

Most of the custom chips today, including ASICs, ASSPs (application-specific standard products), and special-purpose custom chips, have function blocks that do not require leading-edge processes. External Source

Eliminate Sallen-Key stopband leakage with a voltage follower

Novel design techniques help reduce stopband leakage in your filter designs. External Source

"In-design" physical verification is "on-time" physical verification

GUEST OPINION It's no longer practical to wait until the end of the physical design of an IC to do physical verification. External Source

RFIDs power themselves

The IC Insider takes a look at the charge pump of Alien Technology's Alien Higgs RFID. External Source

Innovating out of the downturn

GUEST OPINION: If history is any indicator, innovation, not the business cycle, will pull the semiconductor industry out of recession. But this time young, innovative companies jumping on advanced processes may play a disproportionate role. External Source

Power fortunes: Estimating power in FPGA designs

As FPGAs enter new applications, designers must estimate power consumption early, closely watch it, and then attempt to measure the results. External Source

Verification methodology for low power: your blueprint to working silicon

GUEST OPINION: The combination of voltage-aware verification tools and a verification methodology specific to low power will dramatically improve the chances for first-pass working silicon for low-power designs. External Source

Flip-flop flap

Tales From The Cube: A USB controller in an FPGA hangs up after just a couple of seconds of operation. Simulations showed that everything was fine. External Source

Simulator speeds eye measurements

Agilent Technologies has introduced a 1 million-bit-per-minute signal-integrity channel simulator for multigigabit chip-to-chip data-link design. The channel simulator allows you to perform an interactive eye-diagram measurement from channel simulations ... External Source

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