cadence design systems

Lower power mixed-signal circuit design using EDA

With the explosive growth of personal, wireless, and mobile communications, as well as home electronics, comes the demand for high-speed computation and complex functionality for competitive reasons. Today’s portable products are expected not only to ... ECN Asia
Embedded Systems and Networking - Software

Effective ECO reduces schedule risks through automation

Engineering change orders (ECO) continue to dominate as one of the top concerns for ASIC design teams and their management. From a project view, planning for ECOs in the critical path is not unheard of; in fact, it is typically built into the design ... ECN Asia
Embedded Systems and Networking - Software

Cadence Virtuoso IC 6.1 Successfully Deployed by Matsushita for Analog and Mixed-Signal SoC Designs

Cadence Design Systems has announced that the newest version of the Cadence Virtuoso custom design platform has been deployed by Matsushita Electric Industrial Co., Ltd., best known for its Panasonic brand, for analog and mixed-signal advanced-node designs... EDN Asia
EDA Tools and IP Cores

India – the design powerhouse

...where convergence and complexity can present a host of opportunities for Indian companies? Only time will tell. Author Information Jaswinder Ahuja is the Corporate Vice President and Managing Director of Cadence Design Systems (I) Pvt Ltd. EDN Asia
Programmable Logic - Signal Integrity - Software - Test & Measurement - EDA - Semiconductors - Analog ICs / Discretes - Communication Functions - Component / Hardware / Interconnect - Computers / Boards / Buses - Digital Den - Digital ICs - DSP - EDA Tools and IP Cores - Embedded Development Tools - Memory - Multimedia - Network Processors - Peripherals - Power Sources / Controllers - Processors & Tools

Rethinking chip design methodologies for efficient power management

The world is facing phenomenal energy demand. At the same time, population growth, economic expansion and urban development is creating a greater demand for more personal-mobility items, appliances, devices and services. Recognizing these worrisome trends, ... EDN Asia
Power Sources / Controllers

Cadence Intros C-to-Silicon Compiler

Cadence Design Systems has introduced Cadence C-to-Silicon Compiler, a high-level synthesis product that is said to improve designer productivity up to 10 times in creating and re-using system-on-chip IP. This technology helps bridge the gap between register... EDN Asia
EDA Tools and IP Cores

An ideal outsourcing destination

India has established itself as the design hub of the world. As per In-Stat, the VLSI design services industry in India generated $1.10 billion in 2006, and is expected to go up to $2.45 billion in 2010. Apart from well-known reasons such as a large ... EDN Asia
Digital Den

India’s fab dilemma

With India’s recently-announced semiconductor policy, “to fab” or ‘not to fab’ is a dilemma being pondered in the India semiconductor ecosystem. A state of the art fabrication unit today requires investments upwards of $3 billion. Shrinking product ... EDN Asia

Webcast: Cadence 3Q 2006 Financial Results

Cadence Design Systems, Inc. will present their third quarter 2006 financial results. Participating on the webcast will be Mike Fister, president and chief executive officer and Bill Porter, executive vice president and chief financial officer. Others:... EDN Asia

The India advantage

The Indian semiconductor industry is in a very exciting phase today, poised to witness enormous growth. The ISA commissioned Frost & Sullivan report released in February 2006 predicts that the Indian electronics equipment consumption market will grow ... EDN Asia
Digital Den - EDA Tools and IP Cores

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